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1ºÎ 80C196KC¶õ? 1Àå ¿øÄ¨ ¸¶ÀÌÅ©·Î ÇÁ·Î¼¼¼ 1.0 ¼·Ð 1.1 ¿øÄ¨ ¸¶ÀÌÅ©·Î ÇÁ·Î¼¼¼ÀÇ Á¾·ù¿Í Ư¡ (ÀÎÅÚ Á¦Ç°) 1.1.1 MCS -48 1.1.2 MCS -51 1.1.3 MCS -96 1.2 80C196KCÀÇ Æ¯Â¡ 1.3 ¿øÄ¨ ¸¶ÀÌÅ©·Î ÇÁ·Î¼¼¼ÀÇ ÀÀ¿ë 1.4 ¸ÎÀ½¸» 2Àå CPU (Central Processing Unit) 2.0 ¼·Ð 2.1 CPU¶õ? 2.2 80C196KCÀÇ CPU±¸Á¶ 2.2.1 ¸Þ¸ð¸® Á¦¾î±â(memory Controller)¿Í CPU Á¦¾î 2.2.2 RALU(Register/Arithmetic Logic Unit) 2.3 80C196KCÀÇ Å¬·°°ú 󸮼ӵµ 2.4 ¸ÎÀ½¸» 3Àå ¸Þ¸ð¸® ±¸Á¶(Memory Architecture) 3.0 ¼·Ð 3.1 ¸Þ¸ð¸® ¸Ê(Memory Map) 3.2 ³»ºÎ RAM ¿µ¿ª(Internal RAM Area) 3.2.1 ·¹Áö½ºÅÍ ÆÄÀÏ(Register File, RF) 3.2.2 Ư¼ö±â´É ·¹Áö½ºÅÍ (Special Function Register, SFR) 3.2.3 ½ºÅà Æ÷ÀÎÅÍ ·¹Áö½ºÅÍ (Stack Pointer Register, SP) 3.3 ·¹Áö½ºÅÍ Ã¢¹Ù²Ù±â(Register Windowing) 3.3.1 Çʿ伺 3.3.2 ¼öÆò À©µµ¿ì (Horizontal Window) 3.3.3 ¼öÁ÷ À©µµ¿ì (Vertical Window) 3.4 ¸ÎÀ½¸» 4Àå ÇÁ·Î±×·¡¹Ö(Programming) 4.0 ¼·Ð 4.1 ¿ÀÆÛ·£µå¿¡¼ µ¥ÀÌÅÍ ÇüÅ 4.1.1 BIT 4.1.2 BYTE 4.1.3 SHORT-INTEGER 4.1.4 WORD 4.1.5 INTEGER 4.1.6 DOUBLE-WORD 4.1.7 LONG-INTEGER 4.2 ¿ÀÆÛ·£µå¿¡¼ µ¥ÀÌÅÍÀÇ ÁÖ¼ÒÁöÁ¤¹æ½Ä 4.2.1 Register-Direct Addressing 4.2.2 Indirect Addressing 4.2.3 indirect with Auto-Increment Addressing 4.2.4 Immediate Addressing 4.2.5 Short-Indexed Addressing 4.2.6 Long-Indexed Addressing 4.2.7 Zero Register Addressing 4.2.8 Stack Pointer Register Addressing 4.3 ¾î¼Àºí·¯ »ç¿ëÇÒ ¶§ÀÇ ÁÖÀÇÁ¡ 4.4 ¸ÎÀ½¸» 5Àå ÁÖº¯ ÀåÄ¡(Peripheral Devices) 5.0 ¼·Ð 5.1 PWM(Pulse Width Modulation) 5.2 ŸÀ̸Ó(Timer) 5.3 °í¼Ó ÀÔ·Â(High Speed Input, HSI) 5.4 °í¼Ó Ãâ·Â(High Speed Output, HSO) 5.5 Á÷·Ä ÀÔÃâ·Â Æ÷Æ®(Serial I/O Port) 5.6 A/D º¯È¯±â(Analog to Digital Converter) 5.7 ÀÔÃâ·Â Æ÷Æ®(I/O Ports) 5.8 ¿öÄ¡µµ±× ŸÀ̸Ó(Watchdog Timer) 5.9 Ư¼ö ÀÛµ¿ ¸ðµå(Special Operating Mode) 5.10 ¸ÎÀ½¸» 2ºÎ MDS196À̶õ? 6Àå MDS196 6.0 ¼·Ð 6.1 MDS196ÀÇ Æ¯Â¡ 6.2 MDS196ÀÇ ±âº» »ç¿ë¹æ¹ý 6.3 ¸ÎÀ½¸» 7Àå MDS196À¸·Î ÇÁ·Î±×·¥À»! 7.0 ¼·Ð 7.1 ÇÁ·Î±×·¥À» ÀÔ·ÂÇÏÀÚ! 7.2 ÇÁ·Î±×·¥À» ½ÇÇà½ÃŰÀÚ! 7.3 ÇÁ·Î±×·¥¿¡ ¿À·ù°¡! 7.4 ¸ÎÀ½¸» 8Àå MDS196°ú PC ¿¬°áÇϱâ 8.0 ¼·Ð 8.1 MDSPC »ç¿ë¹ý 8.2 MDS196ÀÇ ³»¿ëÀÌ PC ȸ鿡! 8.3 DOS¿¡¼ÀÇ MDS196 »ç¿ë 8.4 PC¿¡¼´Â ¾î¼Àºí¸®¾î·Î! 8.5 PC¿¡¼ MDS196À¸·Î ÇÁ·Î±×·¥ º¸³»±â 8.6 ¸ÎÀ½¸» 3ºÎ ½ÇÀü! 80C196KC 9Àå ±â°è¾î¿Í ¾î¼Àºí·¯(Assembler) 9.0 ¼·Ð 9.1 ¾î¼Àºí·¯°¡ ±â°è¾î·Î 9.2 ¾î¼Àºí·¯ÀÇ »ç¿ë¹æ¹ý 9.3 ÇÁ·Î±×·¥ »óÅ ¿öµå (Program Status Word, PSW) 9.3.1 ¿©·¯ Ç÷¡±× (PSWÀÇ »óÀ§ ¹ÙÀÌÆ®) 9.3.2 ÀÎÅÍ·´Æ® Ç÷¡±×µé (PSWÀÇ ÇÏÀ§ ¹ÙÀÌÆ®, INT_MASK1) 9.4 ¸í·É¾î Ç¥¸¦ º¸´Â ¹æ¹ý 9.5 ¸ÎÀ½¸» 10Àå ¾î¼Àºí·¯ ¸í·É¾î-³í¸®¿¬»ê 10.0 ¼·Ð 10.1 OR °ü·Ã ¸í·É 10.1.1 OR 10.1.2 ORB 10.2 AND °ü·Ã ¸í·É 10.2.1 AND 10.2.2 ANDB 10.3 XOR °ü·Ã ¸í·É 10.3.1 XOR 10.3.2 XORB 10.4 NOT °ü·Ã ¸í·É 10.4.1 NOT 10.4.2 NOTB 10.5 SHIFT °ü·Ã ¸í·É 10.5.1 SHL 10.5.2 SHLB 10.5.3 SHLL 10.5.4 SHR 10.5.5 SHRB 10.5.6 SHRL 10.5.7 SHRA 10.5.8 SHRAB 10.5.9 SHRAL 10.6 ¸ÎÀ½¸» 11Àå ¾î¼Àºí·¯ ¸í·É¾î-»ê¼ú¿¬»ê 11.0 ¼·Ð 11.1 LD °ü·Ã ¸í·É 11.1.1 LD 11.1.2 LDB 11.1.3 LDBSE 11.1.4 LDBZE 11.2 ST °ü·Ã ¸í·É 11.2.1 ST 11.2.2 STB 11.3 XCH °ü·Ã ¸í·É 11.3.1 XCH 11.3.2 XCHB 11.4 ADD °ü·Ã ¸í·É 11.4.1 ADD 11.4.2 ADDB 11.4.3 ADDC 11.4.4 ADDBC 11.5 SUB °ü·Ã ¸í·É 11.5.1 SUB 11.5.2 SUBB 11.5.3 SUBC 11.5.4 SUBCB 11.6 MUL °ü·Ã ¸í·É 11.6.1 MUL 11.6.2 MULB 11.6.3 MULU 11.6.4 MULUB 11.7 DIV °ü·Ã ¸í·É¾î 11.7.1 DIV 11.7.2 DIVB 11.7.3 DIVU 11.7.4 DIVUB 11.8 CMP °ü·Ã ¸í·É 11.8.1 CMP 11.8.2 CMPB 11.8.3 CMPL 11.9 INC °ü·Ã ¸í·É 11.9.1 INC 11.9.2 INCB 11.10 DEC °ü·Ã ¸í·É 11.10.1 DEC 11.10.2 DECB 11.11 NEG °ü·Ã ¸í·É 11.11.1 NEG 11.11.2 NEGB 11.12 EXT °ü·Ã ¸í·É 11.12.1 EXT 11.12.2 EXTB 11.13 ¸ÎÀ½¸» 12Àå ¾î¼Àºí·¯ ¸í·É¾î-Á¡ÇÁ ¸í·É 12.0 ¼·Ð 12.1 Á¡ÇÁ °ü·Ã ¸í·É 12.1.1 BR 12.1.2 SJMP 12.1.3 LJMP 12.1.4 TIJMP 12.2 ºñ±³ Á¶°Ç Á¡ÇÁ °ü·Ã ¸í·É 12.2.1 JE 12.2.2 JNE 12.2.3 JGE 12.2.4 JLT 12.2.5 JGT 12.2.6 JLE 12.2.7 JH 12.2.8 JNH 12.3 Ç÷¡±× Á¶°Ç Á¡ÇÁ ¸í·É 12.3.1 JC 12.3.2 JNC 12.3.3 JV 12.3.4 JNV 12.3.5 JVT 12.3.6 JNVT 12.3.7 JST 12.3.8 JNST 12.4 ºñÆ® Á¶°Ç Á¡ÇÁ °ü·Ã ¸í·É 12.4.1 JBS 12.4.2 JBC 12.5 ·çÇÁ Á¶°Ç Á¡ÇÁ °ü·Ã ¸í·É 12.5.1 DJNZ 12.5.2 DJNZW 12.6 ¸ÎÀ½¸» 13Àå ¾î¼Àºí·¯ ¸í·É¾î 13.0 ¼·Ð 13.1 ÄÝ ¹× ¸®ÅÏ °ü·Ã ¸í·É 13.1.1 SCALL 13.1.2 LCALL 13.1.3 RET 13.2 ÀÎÅÍ·´Æ® °ü·Ã ¸í·É 13.2.1 EI 13.2.2 DI 13.2.3 TRAP 13.3 ½ºÅà °ü·Ã ¸í·É 13.3.1 PUSH 13.3.2 PUSHF 13.3.3 PUSHA 13.3.4 POP 13.3.5 POPF 13.3.6 POPA 13.4 PTS °ü·Ã ¸í·É 13.4.1 EPTS 13.4.2 DPTS 13.5 ¸ÎÀ½¸» 14Àå ¾î¼Àºí·¯ ¸í·É¾î-±âŸ ¸í·É 14.0 ¼·Ð 14.1 Áö¿ì±â °ü·Ã ¸í·É 14.1.1 CLR 14.1.2 CLRB 14.2 Ç÷¡±× °ü·Ã ¸í·É 14.2.1 SETC 14.2.2 CLRC 14.2.3 CLRVT 14.3 ºí·Ï°ü·Ã ¸í·É 14.3.1 BMOV 14.3.2 BMOVI 14.4 ±âŸ ¸í·É 14.4.1 NOP 14.4.2 SKIP 14.4.3 RST 14.4.4 NORMAL 14.4.5 IDLPD 14.5 ¸ÎÀ½¸» 4ºÎ Ȱ¿ë! 80C196KC 15Àå ÀÎÅÍ·´Æ®(Interrupt) 15.0 ¼·Ð 15.1 ÀÎÅÍ·´Æ® ±âº» »çÇ× 15.1.1 ÀÎÅÍ·´Æ® Á¾·ù 15.1.2 ÀÎÅÍ·´Æ® ¿äû ½ÅÈ£ 15.1.3 ÀÎÅÍ·´Æ® ¼öÇà ·çÆ¾ (ISR) 15.1.4 ÀÎÅÍ·´Æ® ¿ì¼±¼øÀ§ 15.2 ÀÎÅÍ·´Æ® °ü·Ã ·¹Áö½ºÅ͵é 15.2.1 ÀÎÅÍ·´Æ® Ææµù ·¹Áö½ºÅÍ (Interrupt Pending Register) 15.2.2 ÀÎÅÍ·´Æ® ¸¶½ºÅ© ·¹Áö½ºÅÍ (Interrupt Mask Register) 15.3 ÀÎÅÍ·´Æ® ó¸® °úÁ¤ 15.4 ÀÎÅÍ·´Æ® ŸÀÌ¹Ö 15.4.1 ¿ÜºÎ ÀÔ·Â ÀÌ¿ë½Ã ÀÎÅÍ·´Æ® ½Ã°£ 15.4.2 ÀÎÅÍ·´Æ® È£Ã⠽ð£ (Interrupt Latency) 15.4.3 È£Ã⠽𣠰è»ê 15.5 Ư¼ö ÀÎÅÍ·´Æ® (Special Interrupt) 15.5.1 À߸øµÈ ¸í·É¾î ÀÎÅÍ·´Æ® (Unimplemented Opcode Interrupt) 15.5.2 ¼ÒÇÁÆ®¿þ¾î Æ®·¦ ÀÎÅÍ·´Æ® (Software Trap Interrupt) 15.5.3 NMI ÀÎÅÍ·´Æ® (Nonmaskable Interrupt) 15.6 ÀÎÅÍ·´Æ® Ȱ¿ë 15.6.1 ÀÎÅÍ·´Æ® ¼±Åà (Selecting Interrupt Service) 15.6.2 ÀÎÅÍ·´Æ® °¡´É (Enabling Interrupts) 15.6.3 ÀÎÅÍ·´Æ® ÀÔ·Â ½ÅÈ£ ¼±Åà (Selecting Interrupt Sources) 15.6.4 ÀÎÅÍ·´Æ® ¼öÇàÀüÀÇ ÀýÂ÷ (Procedures before Interrupt Service) 15.6.5 ÀÎÅÍ·´Æ® ¼öÇàÈÄÀÇ ÀýÂ÷ (Procedures after Interrupt Service) 15.7 ¸ÎÀ½¸» 16Àå PTS(Peripheral Transaction Server) 16.0 ¼·Ð 16.1 PTS ÀÛµ¿ ¿ø¸® 16.2 PTS ÀÎÅÍ·´Æ®ÀÇ Å¸ÀÌ¹Ö 16.2.1 PTS ÀÎÅÍ·´Æ® È£Ã⠽ð£ (PTS Interrupt Latency) 16.2.2 PTS ÀÎÅÍ·´Æ® È£Ã⠽𣠰è»ê 16.3 PTS Á¦¾î ºí·Ï (PTS Control Block, PTSCB) 16.3.1 PTSCOUNT ·¹Áö½ºÅÍ 16.3.2 PTSCON ·¹Áö½ºÅÍ 16.4 PTS ¸ðµå (PTS Modes) 16.4.1 ½Ì±Û Àü¼Û ¸ðµå (Single Transfer Mode) 16.4.2 ºí·Ï Àü¼Û ¸ðµå (Block Transfer Mode) 16.4.3 A/D ½ºÄµ ¸ðµå (A/D Scan Mode) 16.4.4 °í¼Ó ÀÔ·Â ¸ðµå (HSI Mode) 16.4.5 °í¼Ó Ãâ·Â ¸ðµå (HSO Mode) 16.5 PTS ÀÎÅÍ·´Æ® Ȱ¿ë 16.5.1 PTS ÀÎÅÍ·´Æ® ¼±Åà (Selecting PTS Interrupt Service) 16.5.2 PTS ÀÎÅÍ·´Æ® °¡´É (Enabling PTS Interrupts) 16.5.3 PTS ÀÎÅÍ·´Æ® ¼öÇà ÀýÂ÷ (Procedures of PTS Interrupt Service) 16.6 ¸ÎÀ½¸» 17Àå PWM(Pulse Width Modulation) 17.0 ¼·Ð 17.1 PWMÀÇ ÀÛµ¿¿ø¸® 17.2 PWM µàƼ »çÀÌŬ ÇÁ·Î±×·¥ Çϱâ 17.3 PWM Ãâ·Â °¡´ÉÇÏ°Ô Çϱâ 17.4 ¾Æ³¯·Î±× Ãâ·Â »ý¼ºÇϱâ 17.5 ¸ÎÀ½¸» 18Àå ŸÀ̸Ó(Timer) 18.0 ¼·Ð 18.1 ŸÀ̸Ó1 18.2 ŸÀ̸Ó2 18.2.1 ŸÀ̸Ó2ÀÇ °³¿ä 18.2.2 ŸÀ̸Ó2 ÇÁ·Î±×·¡¹Ö 18.2.3 ¿ÜºÎ ŸÀ̸Ó2 ÀÔ·Â »ç¿ëÇϱâ 18.3 ŸÀÌ¸Ó ÀÎÅÍ·´Æ® 18.3.1 ŸÀÌ¸Ó °ªÃʰú ÀÎÅÍ·´Æ® 18.3.2 ŸÀ̸Ó2 °ªÃʰú ÀÎÅÍ·´Æ® 18.3.3 ŸÀ̸Ó2 ĸÃç ÀÎÅÍ·´Æ® 18.4 ŸÀÌ¸Ó »ç¿ëÇÒ ¶§ À¯ÀÇ »çÇ× 18.5 ¸ÎÀ½¸» 19Àå °í¼Ó ÀÔ·Â(High Speed Input, HSI) 19.0 ¼·Ð 19.1 °í¼Ó ÀÔ·ÂÀÇ ÀÛµ¿±¸Á¶ 19.2 °í¼Ó ÀԷ ŸÀÌ¹Ö ¹®Á¦ 19.3 °í¼Ó ÀÔ·Â »ç°Ç °ª Àбâ 19.4 °í¼ÓÀÔ·Â ¸ðµâ ÇÁ·Î±×·¡¹Ö 19.4.1 °í¼ÓÀԷ°ü·Ã Á¦¾î ·¹Áö½ºÅÍ ¹× »óÅ ·¹Áö½ºÅÍ 19.4.2 °í¼ÓÀÔ·Â »ç°ÇÀÇ Á¤ÀÇ ¹× ¸ðµå 19.4.3 °í¼ÓÀÔ·Â ÀÎÅÍ·´Æ® °¡´ÉÇÏ°Ô Çϱâ 19.4.4 °í¼ÓÀÔ·Â ÇÉÀÇ °í¼ÓÀԷ°¡´É ¹× ºÒ°¡´ÉÇÏ°Ô ÇÏ ±â 19.4.5 °í¼ÓÀÔ·Â ÇÉÀÇ Ãß°¡ÀûÀÎ ´Ù¸¥ ±â´É 19.5 ¸ÎÀ½¸» 20Àå °í¼Ó Ãâ·Â(High Speed Output, HSO) 20.0 ¼·Ð 20.1 °í¼ÓÃâ·Â ±â´É °³¿ä (HSO Functional Overview) 20.2 °í¼ÓÃâ·Â ¸ðµâ ÇÁ·Î±×·¡¹Ö 20.2.1 °í¼ÓÃâ·Â »ç°Ç ÇÁ·Î±×·¡¹Ö 20.2.2 °í¼ÓÃâ·Â ÀÎÅÍ·´Æ®(HSO Interrupt) °¡´ÉÇÏ°Ô ÇÏ ±â 20.2.3 CAMÀÇ ³»¿ë º¸È£Çϱâ 20.2.4 CAMÀÇ ³»¿ë Áö¿ì±â 20.2.5 °í¼ÓÃâ·Â »ç°Ç(Event) Ãë¼ÒÇϱâ 20.2.6 HSO.4¿Í HSO.5 ÇɵéÀ» »ç¿ë °¡´ÉÇÏ°Ô Çϱâ 20.2.7 HSO.0-HSO.5¸¦ Ãâ·Â Çɵé·Î »ç¿ëÇϱâ 20.3 HSO ¸ðµâÀ» ÀÌ¿ëÇÏ¿© PWM Ãâ·Â ¸¸µé±â 20.4 HSO Ãâ·Â ŸÀÌ¹Ö 20.5 ¸ÎÀ½¸» 21Àå Á÷·Ä Åë½Å(Serial Communication) 21.0 ¼·Ð 21.1 Á÷·ÄÅë½Å Æ÷Æ®ÀÇ °³¿ä 21.2 ¸ðµå0 21.3 ºñµ¿±â ¸ðµåµé(Asynchronous Modes) 21.3.1 ¸ðµå1 21.3.2 ¸ðµå2 21.3.3 ¸ðµå3 21.3.4 ¸ðµå2¿Í ¸ðµå3 ŸÀÌ¹Ö 21.3.5 ÇÁ·Î¼¼¼°£ÀÇ Åë½Å(Multiprocessor Communications) 21.4 Á÷·ÄÅë½Å Æ÷Æ® ÇÁ·Î±×·¡¹Ö Çϱâ 21.4.1 Åë½Å ¸ðµå ¼±Åðú ÆÐ¸®Æ¼ °¡´ÉÇÏ°Ô Çϱâ 21.4.2 TXD¿Í RXDÀÇ ¼³Á¤ 21.4.3 Á÷·ÄÅë½Å Æ÷Æ® ÀÎÅÍ·´Æ® °¡´ÉÇÏ°Ô Çϱâ 21.4.4 º¸·¹ÀÌÆ®(baud rate)¿Í Ŭ·° ½ÅÈ£¿ø ÇÁ·Î±×·¡ ¹Ö Çϱâ 21.5 Á÷·ÄÅë½Å Æ÷Æ® »óÅ 21.6 ¸ÎÀ½¸» 22Àå A/D º¯È¯±â 22.0 ¼·Ð 22.1 A/D ±â´É¿¡ ´ëÇÑ °³¿ä 22.2 A/D º¯È¯±â ÇÁ·Î±×·¡¹Ö Çϱâ 22.2.1 A/D »ùÇÃ(Sample) ½Ã°£ ¹× º¯È¯(Conversion) ½Ã°£ ¼±ÅÃÇϱâ 22.2.2 IOC2 ·¹Áö½ºÅÍ ÇÁ·Î±×·¡¹Ö Çϱâ 22.2.3 AD_COMMAND ·¹Áö½ºÅÍ ÇÁ·Î±×·¡¹Ö Çϱâ 22.3 º¯È¯ °á°ú Àбâ 22.4 A/D º¯È¯±â¿Í ¿¬°áÇϱâ 22.4.1 ¾Æ³¯·Î±× Á¢Áö(Analog Ground)¿Í ±âÁØ Àü¾Ð (Reference) 22.4.2 È¥ÇÕµÈ ¾Æ³¯·Î±× ¹× µðÁöÅÐ ÀԷµéÀÇ »ç¿ë 22.5 Àü´ÞÇÔ¼ö(Transfer Function)¿Í A/D ¿ÀÂ÷ ¿øÀεé 22.6 ¸ÎÀ½¸» 23Àå ÀÔÃâ·Â Æ÷Æ®(I/O Port) 23.0 ¼·Ð 23.1 ±â´É¿¡ ´ëÇÑ ¼³¸í 23.1.1 ÀÔ·Â Æ÷Æ® ÇÉ(Input Port Pin) 23.1.2 Ãâ·Â Æ÷Æ® ÇÉ(Output Port Pin) 23.1.3 ÁØ¾ç¹æÇâ Æ÷Æ® ÇÉ(Quasi-Bidirectional Port Pin) 23.1.4 ¿ÀÇ µå·¹ÀÎ ¾ç¹æÇâ Æ÷Æ® ÇÉ(Open-Drain Bidirectional Port Pin) 23.2 ÀÔÃâ·Â Æ÷Æ® ÇÁ·Î±×·¡¹Ö Çϱâ 23.2.1 Æ÷Æ® ÀÔ·Â 23.2.2 Æ÷Æ® Ãâ·Â 23.2.3 Æ÷Æ®3°ú Æ÷Æ®4¿¡ÀÇ Á¢±Ù 23.3 ÁØ¾ç¹æÇâ Æ÷Æ®µé¿¡ ´ëÇÑ Çϵå¿þ¾î ¿¬°á¿¡ ´ëÇÑ Á¶¾ð 23.4 ¸ÎÀ½¸» 5ºÎ 80C196KCÀÇ ¾ÈÂÊ 24Àå Çϵå¿þ¾î ¼³°è½Ã Áß¿äÁ¡ 24.0 ¼·Ð 24.1 80C196KCÀÇ ÃÖ¼Ò °á¼±(Minimum Connections) 24.1.1 Æ÷Æ® ¿¬°á (Port Connections) 24.2 80C196KCÀÇ Àü¿øºÎ(Power & Ground Pins) 24.2.1 ÀâÀ½ ¹æÁö ¹æ¹ý (Noise Protection Tips) 24.3 80C196KCÀÇ Å¬·° ½ÅÈ£(Clock Source) 24.3.1 ³»Àå ¹ßÁø±â (On-Chip Oscillator) 24.3.2 ¿ÜºÎ Ŭ·° ½ÅÈ£(External Clock Signal)¸¦ »ç¿ë ÇÏ´Â ¹æ¹ý 24.4 80C196KCÀÇ ¸®¼Â(Reset) ½ÅÈ£ 24.4.1 RESET# ÇÉÀ» 0À¸·Î ¸¸µé±â 24.4.2 ¸®¼Â ¸í·É(RST)¿¡ ÀÇÇÑ ¸®¼Â 24.4.3 À߸øµÈ IDLPD Ű ¿ÀÆÛ·£µå¿¡ ÀÇÇÑ ¸®¼Â 24.4.4 ¿öÄ¡µµ±× ŸÀ̸Ó(Watchdog Timer)¿¡ ÀÇÇÑ ¸®¼Â 24.5 ¸ÎÀ½¸» 25Àå Æ¯¼ö ÀÛµ¿ ¸ðµåµé 25.0 ¼·Ð 25.1 ¾ÆÀÌµé ¸ðµå(Idle Mode) 25.1.1 ¾ÆÀÌµé ¸ðµå·Î µé¾î°¡±â 25.1.2 ¾ÆÀÌµé ¸ðµå·ÎºÎÅÍ ºüÁ® ³ª¿À±â 25.2 ÆÄ¿ö´Ù¿î ¸ðµå(Powerdown Mode) 25.2.1 ÆÄ¿ö´Ù¿î ¸ðµå¸¦ ºÒ°¡´ÉÇÏ°Ô Çϱâ 25.2.2 ÆÄ¿ö´Ù¿î ¸ðµå·Î µé¾î°¡±â 25.2.3 ÆÄ¿ö´Ù¿î ¸ðµå·ÎºÎÅÍ ºüÁ® ³ª¿À±â 25.3 ¿ø½º ¸ðµå(ONCETM Mode) 25.3.1 ¿ø½º ¸ðµå·Î µé¾î°¡±â 25.3.2 ¿ø½º ¸ðµå·ÎºÎÅÍ ºüÁ® ³ª¿À±â 25.4 ¿¹¾àµÈ ½ÃÇè ¸ðµå·Î µé¾î°¡±â 25.5 ¸ÎÀ½¸» 26Àå ¿ÜºÎ ¸Þ¸ð¸® ¿¬°á 26.0 ¼·Ð 26.1 ¿ÜºÎ ¸Þ¸ð¸® ¿¬°á ½ÅÈ£µé(External Memory Interface Signals) 26.2 Ĩ ±¸¼º ·¹Áö½ºÅÍ(Chip Configuration Register) 26.3 ¹ö½º Æø(Bus Width)°ú ¸Þ¸ð¸® ±¸¼º 26.3.1 BUSWIDTH¿¡ ´ëÇÑ Å¸ÀÌ¹Ö ¿ä±¸ Á¶°Çµé 26.3.2 16ºñÆ® ¹ö½º Æø(16-bit Bus Width) 26.3.3 8ºñÆ® ¹ö½º Æø(8-bit Bus Width) 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